Resume

You can download a PDF of my resume through this link. Here’s a version of my resume with an image (as some recruiters prefer that).

Professional Summary

R&D Engineer with experience in 100+ layer PCB design. Proven track record in PDN optimization and IR Drop control for High Speed tester solutions. Expert in Python-based engineering automation tools.

Technical Skills

  • Hardware Design: Signal Integrity, Power Integrity, High Speed Design, Impedance Control, DFM and DFA compliance, PCB Layout, Stackup Design, Component Selection, MLO
  • Tools & Technologies: Cadence Allegro, Cadence Sigrity, Ansys Electronics Desktop, Machine Learning
  • Methodologies: Design of Experiments (Factorial Design), Root Cause Analysis, First-Principles Thinking
  • Programming Languages: Python, Bash

Professional Experience

R&D Engineer | DIS Tech Philippines (March 2026 - Present)

  • Completed two R&D initiatives that became the architectural blueprint for next-generation product development and customer requirements

Hardware Engineer | DIS Tech Philippines (Acquired from Teradyne) (Oct 2023 - March 2026)

  • Successfully managed a concurrent portfolio of five high-priority projects (four SI/PI analysis and one high-complexity PCB Design facilitation), demonstrating exceptional project management skills in a high-pressure R&D environment.
  • Analyzed Signal and Power Integrity (SI/PI) using Simulation tools (Cadence Sigrity and Ansys Electronics Desktop) to achieve key performance metrics, including PDN optimization, IR Drop control, and Insertion/Return Loss compliance for multiple projects.
  • Managed the complete development lifecycle for high-complexity PCB tester solutions and R&D boards (including high-current boards reaching up to 100 layers) in Cadence Allegro PCB Designer for Teradyne’s UltraFlex and UltraFlex Plus DIBs.
  • Engineered comprehensive Python-based automation tooling that streamlined the design verification process, resulting in a reduction of around 4 days of design work without compromising on output quality
  • Formally mentored 8 engineers on technical processes and tool implementation
  • Actively presented to weekly knowledge sharing sessions, presenting on various technical topics such as Stackups, Internal Tooling, and Best Practices
  • Spearheaded an efficiency initiative focused on another engineering team, identifying key bottlenecks and implementing new process flows that resulted in a measurable increase in their core output
  • Hired as one of the first 21 Design Engineers for the new Philippine Design Center

Junior Data Analyst | NextPay (Feb 2023 - Aug 2023)

  • Applied data-driven methodologies using PostgreSQL and BI tools to analyze business performance, reinforcing an analytical mindset relevant to simulation data

Education

Master of Engineering in Electronics Engineering - Mapua University (Expected 2027)

  • Specialization in Microelectronics

Bachelor of Science in Electrical Engineering - Mapua University (2019-2023)

  • Published a Research Paper focused on ML Applications on the Grid in an IEEE Conference. doi:10.1109/HNICEM57413.2022.10109403